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Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Features
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Low-power scan mode for low on-hook power dissipation (55 mW max) Low active power dissipation; talk or on-hook transmission (240 mW max) Distortion-free on-hook transmission Eight operating states via latched paralleled data inputs with channel select feature Precision fixed 28 mA current limiter Integrated protection No external protection device required Integrated ringing access relay Ring trip detector Loop closure detector with hysteresis Relay driver Battery noise cancellation Thermal protection 44-pin, surface-mount, plastic package (PLCC)
Included in the L8574 are a solid-state ringing access switch and a line break switch. Also included is a relay driver for an external (test) access mechanical relay. State control is via four latched parallel data inputs. A chip select feature allows the user to enable, disable, or reset the data latches to a known logic state. The L8574 offers a low-power scan state to minimize power to less than 55 mW in the on-hook state. The L8574 also supports on-hook transmission. The active power in both the talk or on-hook transmission mode is also very low (<240 mW). Current is limited to a fixed value of 25 mA by an internal precision current-limit circuit. Because of the internal architecture of the L8574 SLIC and because of the power rating of the associated external feed resistors, the L8574 will meet most surge requirements without use of an external secondary protection device. Internal circuitry steers both positive and negative faults to fault ground. Negative faults are not dumped into battery. The L8574 is a two-chip line interface solution packaged in a single, 44-pin PLCC package. The Tip and Ring drive amplifiers, the XMT amplifier, the receive interface, and battery noise cancellation circuits are fabricated in a 90 V complementary bipolar (CBIC) process. The ring access switch, line break switch, battery switch, current-limit, protection functions, supervision, and control functions are fabricated in a 320 V dielectrically isolated bipolar-CMOS-DMOS (BCDMOS) process. The device is available in a 44-pin PLCC package.
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s s s s s s s s s s
Description
The L8574 is a resistive subscriber line interface circuit (SLIC) that is optimized for long loop applications, such as Bellcore TR-NWT-000057 requirements for digital loop carrier (DLC) applications. It interfaces the low-voltage circuits on an analog line card to the Tip/Ring subscriber loop. The L8574 does not supply dc current to the subscriber loop; external resistors are used for this purpose.
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Table of Contents
Contents Page
Features ....................................................................................................................................................................1 Description ................................................................................................................................................................1 Architectural Diagram ................................................................................................................................................4 Pin Information ..........................................................................................................................................................4 Absolute Maximum Ratings.......................................................................................................................................6 Electrical Characteristics ...........................................................................................................................................7 Ring Trip Detector ...................................................................................................................................................8 Battery Feed ...........................................................................................................................................................8 Fault Protection .......................................................................................................................................................9 Transmission Characteristics ................................................................................................................................13 Data Interface and Logic.......................................................................................................................................14 Switch Characteristics...........................................................................................................................................15 Operating States......................................................................................................................................................16 Scan State ............................................................................................................................................................16 Disconnect State...................................................................................................................................................17 Alternate Talk State ...............................................................................................................................................17 Talk State ..............................................................................................................................................................17 Scan Current-Limit State.......................................................................................................................................17 Ringing State ........................................................................................................................................................17 On-Hook Transmission State ................................................................................................................................17 Intermediate Talk State .........................................................................................................................................18 Applications .............................................................................................................................................................18 General .................................................................................................................................................................18 Resistor Module ....................................................................................................................................................22 Protection..............................................................................................................................................................24 Tip/Ring Drivers ....................................................................................................................................................25 Receive Interface ..................................................................................................................................................25 Transmit Interface..................................................................................................................................................25 Battery Noise Cancellation ...................................................................................................................................25 On-Hook Transmission..........................................................................................................................................26 Parallel Data Interface...........................................................................................................................................26 Supervision ...........................................................................................................................................................26 Off-Hook Detection ...............................................................................................................................................26 Ring Trip ................................................................................................................................................................26 Thermal Shutdown................................................................................................................................................27 Relay Driver ..........................................................................................................................................................27 Solid-State Ringing Access...................................................................................................................................27 Battery Supplies....................................................................................................................................................27 dc Characteristics ....................................................................................................................................................27 V-I Characteristics.................................................................................................................................................27 Loop Length ..........................................................................................................................................................28 ac Design.................................................................................................................................................................28 Codec Features and Selection Summary .............................................................................................................28 Design Equations..................................................................................................................................................29 Application Diagram ................................................................................................................................................33 Outline Diagram.......................................................................................................................................................34 44-Pin PLCC .........................................................................................................................................................34 Ordering Information................................................................................................................................................35
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Table of Contents (continued)
Tables Page
Table 1. Pin Descriptions ........................................................................................................................................... 5 Table 2. Operating Conditions and Powering ............................................................................................................ 7 Table 3. Ring Trip Detector ........................................................................................................................................ 8 Table 4. Battery Feed ................................................................................................................................................ 8 Table 5. Electrical Characteristics of Pins PT, PR, and VBF ....................................................................................... 9 Table 6. Loss of Power Supplies.............................................................................................................................. 10 Table 7. Analog Signal Pins..................................................................................................................................... 11 Table 8. ac Transmission Characteristics................................................................................................................. 13 Table 9. Logic Inputs (CE, CS, and B0--B3) and Output NSTAT ............................................................................ 14 Table 10. Timing Requirements (B0--B3 and CS) .................................................................................................. 14 Table 11. Relay Driver (RDO) .................................................................................................................................. 14 Table 12. Battery Switch (SW1) and Ring Break Switch (SW2) .............................................................................. 15 Table 13. Ringing Access Switch (SW3) ................................................................................................................. 15 Table 14. Input State Coding ................................................................................................................................... 16 Table 15. External Components Required............................................................................................................... 20 Table 16. MMC A31A8574AA and MMC A11A8574AA Module.............................................................................. 23
Figures
Page
Figure 1. Architectural Diagram................................................................................................................................. 4 Figure 2. Pin Layout .................................................................................................................................................. 4 Figure 3. Switch On-State V-I Characteristics SW1 and SW2................................................................................. 16 Figure 4. Switch On-State V-I Characteristics SW3................................................................................................. 16 Figure 5. External Components Required ............................................................................................................... 19 Figure 6. Resistor Network...................................................................................................................................... 23 Figure 7. L8574 SLIC Matching Requirements ....................................................................................................... 24 Figure 8. Implementing the Noise Cancellation Function........................................................................................ 25 Figure 9. Ring Trip Threshold .................................................................................................................................. 26 Figure 10. Loop Current vs. Loop Voltage ............................................................................................................... 28 Figure 11. Equivalent Complex Terminations .......................................................................................................... 29 Figure 12. Initial ac Interface for Complex Termination Between L8574 SLIC and T7504 Codec .......................... 30 Figure 13. Revised ac Interface CT and CR Combined into a Single Capacitor CS ................................................. 31 Figure 14. Addition of Resistor RSC from XMT to IRP ............................................................................................. 31 Figure 15. TR-57 Application Diagram .................................................................................................................... 33
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Architectural Diagram
AGND
VCCA +5 A
RDO
DGND VDD
CE
CS
B0
B1
B2
B3
RELAY DRIVER +5 D VXMT TIP CURRENT DRIVER +5 A VBAT1 2
DATA INTERFACE, LATCHES, AND LOGIC
NSTAT
+ AX -
NLC
SWITCH CONTROL
NRT IRCV RCVN RGBN CBN
PROTECT SW2 50 +5 A VBAT1
RECEIVE INTERFACE & BATTERY NOISE CANCELLATION
VXMT RING CURRENT DRIVER
NLC NRT
VBF
SWITCHHOOK DETECTOR PROTECT SW1 50 VBAT1 VBAT1 VBAT2 CLIM CURRENT LIMITER
SW3 RING TRIP DETECTOR VRNG GTO
FGND
RTS
RSW
12-3330.a (C)r2
Figure 1. Architectural Diagram
Pin Information
RGBN AGND RCVN VBAT1 IRCV VCCA CBN XMT
NC
RS
6
5
4
3
2
1
44 43 42 41 40 39 38 37 36 35
PRA PRB NSTAT NC CS B3 B2 B1 B0 CE VDD
TS
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
NC PTA NC VCCA AGND VBAT2 CLIM NC PT PR NC
L8574
34 33 32 31 30 29
RTS
VBAT1
VBF
DGND
FGND
VRNG
RDO
RSW
NC
NC
NC
12-3383.a (F)
Figure 2. Pin Layout 4 Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Pin Information (continued)
Table 1. Pin Descriptions Pin 1 2 3 Symbol IRCV VCCA CBN Type I -- I Name/Function Receive Signal Input (+). The differential current flowing from PT to PR is 200 times the current flowing into IRCV. +5 V Analog dc Supply. +5 V supply for analog circuitry. Battery Noise Capacitor. The current flowing out of PR is -100 times the voltage applied to CBN divided by the impedance connected between RGBN and AGND. Connect a capacitor from CBN to VBF to eliminate battery noise from the Tip/Ring. Battery Noise Gain Resistor. The current flowing out of PR is 100 times the current flowing into RGBN. Connect a resistor from RGBN to AGND to set the gain of the battery noise cancellation circuit. Analog Ground. Ground return for analog circuitry. Protected Ring A. Connect to PRB via an external coupling network. Protected Ring B. Connect to PRA via an external coupling network. Not Status. When low, this logic output indicates either a ring trip or an off-hook condition, depending on the input state of the SLIC. Channel Select. A low-to-high transition on this logic input stores the data on pins B0--B3 into the input latches on the SLIC. Bit 3. B0--B3 determine the state of the SLIC. See the Operating States section. Bit 2. B0--B3 determine the state of the SLIC. See the Operating States section. Bit 1. B0--B3 determine the state of the SLIC. See the Operating States section. Bit 0. B0--B3 determine the state of the SLIC. See the Operating States section. Channel Enable. A low on this logic input resets latches B0--B3 to the 1111 state and disables the channel select input CS. A high on this logic input enables the channel select input CS. +5 V Digital dc Supply. +5 V supply for logic and switch circuitry. Digital Ground. Ground return for VDD and the relay driver. Relay Driver. This output drives an external relay. Ring Trip Sense. Sense input for the ring trip detector. Ringing Access Switch. Ringing relay connects this pin to pin VRNG (ringing supply). Connect this pin to pin VBF through a 600 current-limiting resistor. Ringing Supply Voltage. Connect this pin to the ringing supply. Office Battery Supply. Negative high-voltage power supply. Feed Resistor Battery Supply. Negative battery and ringing supply for the loop. Connect this pin to the Ring of the loop through a 200 battery feed resistor. Fault Ground. Protected Ring. The input to the Ring fault protection and output of Ring current drive amplifier (via the Ring access switch). Connect this pin to the Ring of the loop through a 1 k overvoltage protection resistor. Protected Tip. The input to the Tip fault protection and output of Tip current drive amplifier. Connect this pin to the Tip of the loop through a 1 k overvoltage protection resistor. Connect to PTA via an external coupling network.
4
RGBN
I
5 7 8 9 11 12 13 14 15 16
AGND PRA PRB NSTAT CS B3 B2 B1 B0 CE
-- -- -- O I I I I I I
17 18 19 20 21 22 23 25 27 30
VDD DGND RDO RTS RSW VRNG VBAT1 VBF FGND PR
-- -- O I O -- -- -- -- I/O
31
PT
I/O
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Pin Information (continued)
Table 1. Pin Descriptions (continued) Pin 33 34 35 36 38 40 41 42 Symbol CLIM VBAT2 AGND VCCA PTA VBAT1 XMT TS Type I -- -- -- -- -- O I Name/Function Current Limiter Capacitor. Connect a 0.1 F capacitor from this pin to pin VBF. Office Battery Supply. Negative high-voltage power supply. Analog Ground. Ground return for analog circuitry. +5 V Analog dc Supply. +5 V supply for analog circuitry. Protected Tip A. Connect to PT via an external coupling network. Office Battery Supply. Negative high-voltage power supply. Transmit Signal Output. Transmit amplifier output to codec. Tip Sense. Negative (-) input of transmit op amp. Connect one high-value resistor between TS and the Tip of the loop and another high-value resistor between TS and XMT. Ring Sense. Positive (+) input of the transmit op amp. Connect one high-value resistor between RS and the Ring of the loop and another high-value resistor between RS and AGND (see the application diagram, Figure 5). Receive Signal Input (-). The differential current flowing from PT to PR is -200 times the voltage applied to RCVN divided by the impedance connected between IRCV and AGND.
43
RS
I
44
RCVN
I
On the printed-wiring board (PWB), make the leads to FGND and VBF as wide as possible for thermal and electrical reasons. Also, maximize the amount of PWB copper on all leads connected to this device for the lowest operating temperature.
Absolute Maximum Ratings
(@ TA = 25 C) Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those indicated in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Parameter +5 V dc Supplies (VCCA & VDD) Office Battery Supply Logic Input Voltage Logic Input Clamp Diode Current, per Pin Logic Output Voltage Logic Output Current, per Pin (excluding relay driver) Operating Temperature Range Storage Temperature Range Relative Humidity Range Ground Potential Difference (DGND to AGND) Symbol -- VBAT1 VBAT2 -- -- -- -- -- Tstg -- -- Min -0.5 -63 -63 -0.5 -- -0.5 -- -40 -40 5 -- Typ -- -- -- -- 20 -- 35 -- -- -- 3 Max 7.0 0.5 0.5 VDD + 0.5 -- VDD + 0.5 -- 125 125 95 -- Unit V V V V mA V mA C C % V
Notes: Analog voltages (VCCA, VBAT1, and VBAT2) are referenced to AGND, and digital (logic) voltages (VDD) are referenced to DGND. The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. For example, inductance in a supply lead could resonate with the supply filter capacitor to cause a destructive overvoltage.
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Electrical Characteristics
In general, minimum and maximum values are testing requirements. However, some parameters may not be tested in production because they are guaranteed by design and device characterization. Typical values reflect the design center or nominal value of the parameter; they are for information only and are not a requirement. Minimum and maximum values apply across the entire temperature range (-40 C to +85 C) and entire battery range (-35 V to -60 V). Unless otherwise specified, typical is defined as 25 C, VCCA and VDD = +5.0 V, VBAT1 and VBAT2 = -48 V. Positive currents flow into the device. Table 2. Operating Conditions and Powering Parameter Temperature Range Humidity Range Supply Voltages: VCCA VDD VBAT1 VBAT2 VCCA - VDD Supply Currents (scan state; no loop current)2: IVCCA + IVDD (+5 V) IVBAT1 (-48 V) + IVBAT2 (-48 V) Supply Currents (talk or on-hook transmission state; no loop current)2: IVCCA + IVDD (+5 V) IVBAT1 (-48 V) + IVBAT2 (-48 V) Total Power Dissipation (no loop current)2 (VCCA and VDD = +5 V; VBAT1 and VBAT2 = -48 V): Talk or On-hook Transmission State Scan State Power Supply Rejection (Tip/Ring)3: VCCA (500 Hz--3 kHz; 50 mVrms ripple) VDD (500 Hz--3 kHz; 50 mVrms ripple) VBAT2 and VBAT1 (500 Hz--2 kHz; 50 mVrms ripple)4 VBAT2 and VBAT1 (2 kHz--3 kHz; 50 mVrms ripple)4 Thermal3: Thermal Resistance (still air) Operating Tjc Thermal Shutdown Temperature
1. 2. 3. 4.
Min -40 5 4.6 4.6 -42.5 -20 -- -- -- -- --
Typ -- -- 5.0 5.0 -48 -48 -- -- -- -- --
Max 85 951 5.5 5.5 -60 VBAT1 0.5 3.0 -825 6.0 -4.5
Unit C %RH V V V V V mA A mA mA
-- -- 40 50 40 35 -- -- --
-- -- 50 -- -- 40 -- -- 145
240 55 -- -- -- -- 60 135 --
mW mW dB dB dB dB C/W C C
Not to exceed 26 grams of water per kilogram of dry air. Includes current in all external resistors per Figure 15. This parameter is not tested in production. It is guaranteed by design and device characterization. VBAT1 and VBAT2 power supply rejection depends on the battery noise cancellation circuit. The performance stated here applies to VBAT2 only during the talk state and VBAT1 only during the on-hook transmission state and assumes proper battery noise cancellation (see Figure 5).
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Electrical Characteristics (continued)
Ring Trip Detector
Table 3. Ring Trip Detector Parameter Ringing Frequency (f) dc Voltage ac Voltage Ring Trip2 (NSTAT = 0): Loop Resistance Trip Time (f = 20 Hz) NSTAT Valid Source1: Min 17 -36 60 1840 -- -- Typ 20 -- -- -- -- -- Max 28 -57 105 -- 200 80 Unit Hz V Vrms ms ms
1. The ringing source consists of the ac and dc voltages added together (battery-backed ringing); the ringing return is battery ground. 2. Pretrip: ringing must not be tripped by a 10 k resistor in parallel with an 8 F capacitor applied across Tip and Ring.
Battery Feed
Table 4. Battery Feed Parameter Loop Resistance dBm overload into 600 ): ILOOP = 18 mA at VBAT2 = -42 V Longitudinal Current Capability per Wire2 dc Loop Current Limit (RLOOP = 200 ) Current-limiter ac Output Impedance3: 200 Hz to 4 kHz Current-limiter Transient Current (in response to a step voltage change on VBF) Switchhook Detector Loop Resistance4: Off-hook (NSTAT = 0) On-hook (NSTAT = 1) Longitudinal to Metallic Balance--IEEE5 Std. 4556: 200 Hz to 1 kHz 1 kHz to 3 kHz Metallic to Longitudinal (Harm) Balance7: 200 Hz to 4 kHz Range1 (3.17 Min 1840 8.5 26.5 -- 8 -- -- 4400 58 53 30 Typ -- -- 28 -- -- 3300 -- -- -- -- -- Max -- -- 29.5 25 150 -- 2700 -- -- -- -- Unit mArms mA mA dB dB dB
1. Assumes 2 x 200 external dc feed resistors. 2. When the current-limit circuit is active and the battery switch is off, the longitudinal current must be less than the dc loop current to ensure proper ac transmission. 3. Assumes CLIM = 33 nF; CLIM determines the ac output impedance of the current-limit circuit when it is active. 4. Detector values are independent of office battery and are valid over the entire range of VBAT1 and VBAT2. However, NSTAT must indicate an on-hook (NSTAT = 1) if either VBAT1 or VBAT2 is disconnected (open circuit) from its dc source and an off-hook (NSTAT = 0) if the L8574 is in thermal shutdown. The status of the thermal shutdown circuit is output on B3 when CS is high (thermal shutdown is a logic 0). VBAT1 and VBAT2 are defined as disconnected depending on the voltage at the power supply pins as follows (the pins of supplies that have more than one pin are shorted together): -- If VBAT1 -20 V (i.e., more negative than -20 V) and VBAT2 -20 V, then NSTAT must operate normally. -- If VBAT1 -10 V (i.e., more positive than -10 V) or VBAT2 -10 V, then NSTAT must be on-hook (NSTAT = 1). 5. IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc. 6. Assumes the external dc feed resistors are matched to 0.2% and proper battery noise cancellation; i.e., a 0.22 F capacitor from VBF to CBN (see Figure 5). 7. Assumes proper battery noise cancellation; i.e., a 0.22 F capacitor from VBF to CBN (see Figure 5).
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Electrical Characteristics (continued)
Fault Protection
Pins PT, PR, and VBF Pins PT, PR, and VBF are protected by SCRs which clamp surge currents (both positive and negative) to FGND. If the SCR on PR or VBF triggers due to a negative surge, the L8574 automatically switches to the disconnect state while the SCR is conducting current above its hold current. After the SCR releases, the L8574 automatically switches back to the operating state prior to the SCR trigger. Table 5. Electrical Characteristics of Pins PT, PR, and VBF Parameter PT and PR: Surge Current1: Lightning--10 s x 1000 s Lightning--2 s x 10 s Power Cross--60 Hz, 50 ms Power Cross--60 Hz, 1 s Power Cross--60 Hz, 15 min. SCR Trigger Voltage Pin PT: Positive Negative dc Transient Response SCR Trigger Voltage Pin PR: Positive Negative SCR Hold Current (positive and negative) VBF: Surge Current1: Lightning--10 s x 1000 s Lightning--2 s x 10 s Power Cross--60 Hz, 50 ms Power Cross--60 Hz, 1 s Power Cross--60 Hz, 15 min. SCR Trigger Voltage: Positive Negative SCR Hold Current (positive and negative) Trigger Current (if from a power supply--PT, PR, and VBF) dV/dt Sensitivity1, 2 (PT, PR, and VBF) Min Typ Max Unit
-- -- -- -- -- VCCA - 2 -25 -25 150 -220 10
-- -- -- -- -- -- -- -- -- -- --
1 2.5 600 200 50 VCCA + 4 -35 -55 280 320 --
A A mArms mArms mArms V V V V V mA
-- -- -- -- -- 150 -220 10 -- --
-- -- -- -- -- -- -- -- -- 500
5.5 13 3 800 150 280 -320 -- 250 --
A A Arms mArms mArms V V mA A V/s
1. This parameter is not tested in production. It is guaranteed by design and device characterization. 2. Applied voltage is 50 Vpp square wave at 100 Hz to measure dV/dt sensitivity.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Electrical Characteristics (continued)
Fault Protection (continued)
Loss of Power Supplies The L8574 must protect itself from lightning and power cross voltages on Tip and Ring if any (or any combination) of the power supplies (VCCA, VDD, VBAT1, and VBAT2) are disconnected (open circuit) from their dc source. Additionally, if any power supply is disconnected, no overvoltage on Tip or Ring can cause a supply voltage to exceed its maximum rating. Under these conditions, VCCA and VDD are considered as one supply (VCCA shorted to VDD), the pins of supplies which have more than one pin are shorted together, and bypass capacitors are connected. To satisfy these requirements (and also to disconnect ringing from the loop when ring trip cannot be detected), the L8574 is placed into the disconnect state depending on the voltage at the power supply pins as shown in Table 6. Table 6. Loss of Power Supplies Parameter VCCA and VDD: Normal Operating State (as defined by control logic) Disconnect State VBAT1: Normal Operating State (as defined by control logic) Disconnect State Disconnect State Min 1 -- -10 -- -65 Typ -- -- -- -- -- Max -- 4.5 -75 -20 -- Unit V V V V V
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Electrical Characteristics (continued)
Fault Protection (continued)
Loss of Power Supplies (continued) Table 7. Analog Signal Pins Parameter PT and PR: Surge Current (See the Protection section.) Output Drive (PT): Drive Current Negative Voltage Swing (IOUT + 10 mA) Positive Voltage Swing (IOUT - 10 mA) dc Bias Current Output Drive (PR): Positive (sink) Drive Current Negative Voltage Swing (IOUT + 10 mA) Positive Voltage Swing (IOUT - 10 mA) dc Bias Current (VBAT2 = VBAT1 - 48 V)1 Output Short-circuit Transient Current2 Output Impedance (60 Hz--3.4 kHz)3 Output Load Resistance (dc or ac)3 Output Load Capacitance3 XMT: Output Drive Current Output Voltage Swing (1 mA load): Maximum Minimum Output Short-circuit dc Current Output Impedance (60 Hz--3.4 kHz)3 Output Load dc Resistance3 Output Load ac Resistance Output Load Capacitance3 Min Typ Max Unit
15 VBAT1 + 4.5 VCCA - 3.5 600 15 VBAT1 + 4.5 VCCA - 3.5 -0.8 -- 250 100 -- 1 VBAT1 VBAT1 + 5 -- -- 50 2 --
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- VBAT1 VCCA 900 -- VBAT1 VCCA -1.4 125 -- -- 1 -- VCCA 2.5 20 10 -- -- 50
mA V V A mA V V mA mA k nF mA V V mA k k pF
1. Connected per Figure 5. 2. A battery or ground short on PT, PR, or XMT shall not cause a device failure. 3. This parameter is not tested in production. It is guaranteed by design and device characterization.
Lucent Technologies Inc.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Electrical Characteristics (continued)
Fault Protection (continued)
Loss of Power Supplies (continued) Table 7. Analog Signal Pins (continued) Parameter RCVN: Input Voltage Range Input Bias Current Input Impedance3 IRCV: Input Offset Voltage (to RCVN) Input Impedance3 CBN: Surge Current (lightning 10 s x 1000 s) Input Voltage Range Input Bias Current Input Impedance3 Input Positive Clamp Voltage (ICBN = +100 A) Input Negative Clamp Voltage (ICBN = -100 A) RGBN: Input Offset Voltage (to CBN) Input Impedance3 TS and RS: Surge Current from External Source Input Voltage Range3 Input Bias Current Differential Input Impedance3 Common-mode Input Impedance3 External Capacitance (67 k source impedance)3 Min -1.75 -- 20 -- -- -- -1.75 -- 50 1.50 -2.00 -- -- -- VBAT1 + 3 -- 50 50 -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max VCCA - 1.0 1 -- 20 5 100 1.25 250 -- 1.90 -3.20 10 5 25 AGND 1 -- -- 10 Unit V A M mV mA V nA M V V mV mAdc V A k M pF
1. Connected per Figure 5. 2. A battery or ground short on PT, PR, or XMT shall not cause a device failure. 3. This parameter is not tested in production. It is guaranteed by design and device characterization.
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Electrical Characteristics (continued)
Transmission Characteristics
Transmit direction is Tip/Ring to XMT. Receive direction is IRCV/RCVN to Tip/Ring. Table 8. ac Transmission Characteristics Parameter1 ac Termination Return Loss3: 200 Hz--500 Hz 500 Hz--2500 Hz 2500 Hz--3400 Hz Tip/Ring Signal Level (600 reference) Total Harmonic Distortion (200 Hz--4 kHz)3 Transmit Gain (f = 1 kHz): (Tip/Ring) to XMT Receive Gain (f = 1 kHz): IRCV to Differential Current Flowing from IPT to IPR RCVN to IRCV Gain vs. Frequency (transmit and receive; 1 kHz reference)3: 200 Hz--300 Hz 300 Hz--3.4 kHz 3.4 kHz--20 kHz 20 kHz--266 kHz Gain vs. Level (transmit and receive; 0 dBV reference)3: -50 dB to +3 dB Transhybrid Loss3: 200 Hz--500 Hz 500 Hz--2500 Hz 2500 Hz--3400 Hz Idle-channel Noise (Tip/Ring): Psophometric3 C-message 3 kHz Flat3 Idle-channel Noise (XMT): Psophometric3 C-message 3 kHz Flat3 Impedance2 Min -- 21 26 21 -- -- -0.486 195 0.995 -1.00 -0.30 -3.0 -- -0.05 21 26 21 -- -- -- -- -- -- Typ 600 -- -- -- -- -- -0.500 200 1 0 0 0 -- 0 -- -- -- -- -- -- -- -- -- Max -- -- -- -- 3.14 0.3 -0.514 205 1.005 0.05 0.05 1.0 1.0 0.05 -- -- -- -77 12 20 -77 12 20 Unit dB dB dB dBm % -- -- -- dB dB dB dB dB dB dB dB dBmp dBrnC dBrn dBmp0 dBrnC0 dBrn0
1. Requires external components connected as shown in Figure 5. Transmission characteristics are specified assuming a 900 resistive termination and 1% external resistors. 2. Transmission characteristics are specified assuming a 900 resistive termination; however, feedback using external components allows the user to adjust the termination impedance from 900 to most ITU-T recommended complex termination impedances. 3. This parameter is not tested in production. It is guaranteed by design and device characterization.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Electrical Characteristics (continued)
Data Interface and Logic
Table 9. Logic Inputs (CE, CS, and B0--B3) and Output NSTAT Parameter1 High-level Input Voltage Low-level Input Voltage Input Bias Current (high and low) High-level Output Voltage (IOUT = -100 A) Low-level Output Voltage (IOUT = 180 A) Output Short-circuit Current (VOUT = VDD) Output Load Capacitance2 Symbol VIH VIL IIN VOH VOL IOSS COL Min 2 0 -- VDD - 1.5 0 1 0 Max VDD 0.8 10 VDD 0.4 35 50 Unit V V A V V mA pF
1. Unless otherwise specified, all logic voltages are referenced to DGND. 2. This parameter is not tested in production. It is guaranteed by design and device characterization.
Table 10. Timing Requirements (B0--B3 and CS) A low-to-high transition on pin CS latches the data on pins B0--B3 into the device. When CS is either high or low, the device is unaffected by data on pins B0--B3. The status of the thermal shutdown circuit is output on B3 when CS is high (thermal shutdown is a logic 0). A low on channel enable lead CE asynchronously resets the data latch to 1111 (scan state with the relay driver off) and disables CS so that CS cannot latch any data into the device. A high on CE enables CS. Parameter1, 2 CS Rise and Fall Time (10% to 90%) Maximum Input Capacitance Minimum Setup Time from B0--B3 Valid to CS Minimum Hold Time from CS to B0--B3 Not Valid Minimum Pulse Width of CS Symbol tR, tF CIN tSDS tHDS tWCS Min 0 -- 150 50 225 Max 50 5 -- -- -- Unit ns pF ns ns ns
1. Unless otherwise specified, all times are measured from the 50% point of logic transitions. 2. These parameters are not tested in production. They are guaranteed by design and device characterization.
Table 11. Relay Driver (RDO) The relay driver output RDO is low (relay operated) when a low input on B3 is latched into the device. Parameter1 Off-state Output Current (VRDO = VDD) On-state Output Voltage (IRDO = 70 mA) On-state Output Voltage (IRDO = 20 mA) Clamp Diode Reverse Current (VRDO = 0) Clamp Diode On Voltage (IRDO = 150 mA) Turn-on Time2 Turn-off Time2 Symbol IOFF VON VON IR VOC tON tOFF Min -- 0 0 -- VDD -- -- Max 10 1.0 0.40 10 VDD + 2.0 10 10 Unit A V V A V s s
1. Unless otherwise specified, all logic voltages are referenced to DGND. 2. This parameter is not tested in production. It is guaranteed by design and device characterization.
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Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Electrical Characteristics (continued)
Switch Characteristics
Table 12. Battery Switch (SW1) and Ring Break Switch (SW2) Parameter Off-state1: Maximum Differential Voltage dc Leakage Current (VSW 320 V) Feedthrough Capacitance3 On-state (See Figures 3 and 4.): Resistance (RON) Maximum Differential Voltage (Vmax) Current Limit (ILIMIT) dV/dt Sensitivity3, 4 -- -- -- -- -- 20 -- -- -- -- 50 -- 35 200 Min Typ Max 3202 50 50 100 3202 60 -- Unit V A pF V mA V/s
1. SW2 must be off if the voltage on pin PR is more positive than VCCA. 2. At 25 C. Maximum voltage rating has a temperature coefficient of +0.167 V/C. 3. This parameter is not tested in production. It is guaranteed by design and device characterization. 4. Applied voltage is 100 Vpp square wave at 100 Hz to measure dV/dt sensitivity.
Table 13. Ringing Access Switch (SW3) Parameter Off-state: Maximum Differential Voltage dc Leakage Current (VSW = 500 V) dc Leakage Current (VSW = 250 V) Feedthrough Capacitance1 On-state (See Figures 3 and 4.): Crossover Offset Voltage (VOS; ISW = 1 mA) Resistance (RON) Surge Current (10 s x 1000 s pulse)1 Release Current1 dV/dt Sensitivity1, 2 Min -- -- -- -- -- -- -- 0.1 -- Typ -- -- -- -- -- -- -- -- 500 Max 500 20 1 10 3 10 2.0 3 -- Unit V A A pF V A mA V/s
1. This parameter is not tested in production. It is guaranteed by design and device characterization. 2. Applied voltage is 100 Vpp square wave at 100 Hz to measure dV/dt sensitivity.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Electrical Characteristics (continued)
Switch Characteristics (continued)
Operating States
The L8574 has eight operating states. These states are selected using three logic input bits, B0--B2, according to the truth table shown in Table 14. Logic input B3 operates a relay driver independent of the state of bits B0--B2. Data on the parallel data bus, B0--B3, is loaded into a 4-bit latch on the L8574 on the low-tohigh transition of the channel select lead CS. Changes in the data at inputs B0--B3 do not affect the L8574 while CS is either low or high. A low on channel enable lead CE asynchronously resets the 4-bit latch to 1111 (scan state with the relay driver off) and disables the channel select lead CS (i.e., CS is prevented from loading any data into the 4-bit latch). A high on CE enables CS. State transitions and delays between transitions are left to the discretion of the user since, except for fault conditions described later, the state of the L8574 depends only on the external control provided through the logic interface. Table 14. Input State Coding CE B3 B2 B1 B0 0 1 1 1 1 1 1 1 1 1 1 X X X X X X X X X 0 1 X 1 1 1 1 0 0 0 0 X X X 1 1 0 0 1 1 0 0 X X X 1 0 1 0 1 0 1 0 X X State Scan state with relay driver off Scan Disconnect Alternative talk--SW1 closed Talk--SW1 open Scan current limit Ringing On-hook transmission Intermediate talk Relay driver output (RDO) is low (relay active) Relay driver output (RDO) is high (relay not active)
ISW +ILIMIT CURRENT LIMITING
2/3 RON -Vmax -1.5 V RON
VSW
+1.5 V
+Vmax
2/3 RON -ILIMIT
CURRENT LIMITING
12-3332 (F)
Figure 3. Switch On-State V-I Characteristics SW1 and SW2
ISW
RON
-VOS +VOS
VSW
RON
Scan State
s s
Normal on-hook supervision state. The receive transmission path is powered down; the transmit path is powered up. The battery feed is connected to the high battery supply (VBAT1). The current limiter is powered down and disabled. SW1 is closed; SW2 and SW3 are open. NSTAT reflects the status of the switchhook detector.
12-3333 (F)
Figure 4. Switch On-State V-I Characteristics SW3
s
s s s
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications Scan Current-Limit State
s s
Operating States (continued)
Disconnect State
s s
Alternate on-hook supervision state. Same as scan state but with the current limiter powered up and active. The receive transmission path is powered down; the transmit path is powered up. SW1 is closed; SW2 and SW3 are open. NSTAT reflects the status of the switchhook detector.
Forward disconnect state. The receive transmission path is powered down; the transmit path is powered up. The current limiter is powered down and disabled. SW1, SW2, and SW3 are open. Pins PT, PR, and VBF are high impedance (>100 k). NSTAT is forced high (on-hook).
s s
s s s
s s
Ringing State
Normal ringing state. The receive and transmit transmission paths are both powered down. SW3 is closed; SW1 and SW2 are open. The current limiter is powered down and disabled. NSTAT reflects the status of the ring trip detector.
s
Alternate Talk State
s s
s
Alternate talk state. The battery feed is connected to the high battery supply (VBAT1). The receive and transmit transmission paths are both powered up. The current limiter is powered up and active. SW1 and SW2 are closed; SW3 is open. NSTAT reflects the status of the switchhook detector.
s s s
s
s s s
On-Hook Transmission State
s s
Normal on-hook transmission state. The battery feed is connected to the high battery supply (VBAT1). The receive and transmit transmission paths are both powered up. The current limiter is powered down and disabled. A 10 mA dc bias current flows out of the Ring current driver into PR, and a 5 mA dc bias current flows into the Tip current driver from PT (the switchhook detector is adjusted to compensate for this dc bias current). SW1 and SW2 are closed; SW3 is open. NSTAT reflects the status of the switchhook detector.
Talk State
s s
s
Normal talk state. The battery feed is connected to the high battery supply (VBAT2). The receive and transmit transmission paths are both powered up. The current limiter is powered up and active.
s s
s
s s s
s
SW2 is closed; SW1 and SW3 are open.
s
NSTAT reflects the status of the switchhook detector.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Operating States (continued)
Intermediate Talk State
s
the ac output impedance of the current limiter must be small. The effective output capacitance at VBF is approximately 7500 times CLIM when the current limiter is active. The external 200 dc feed resistors will, for the most part, determine the longitudinal balance of the SLIC; thus, they must be matched appropriately to meet the longitudinal balance requirements (0.2% for 58 dB balance, 0.35% for 52 dB balance). The impedance of the battery switch and current limiter in series with the ringside dc feed resistor is reduced by the battery noise cancellation circuit so that it has minimal effect on the longitudinal balance. The dc feed resistors also have a significant impact on the termination impedance of the SLIC. Feedback, using external components, allows the user to adjust the termination impedance from the 400 dc feed resistance to satisfy most resistive and complex termination impedances. Because the L8574 does not supply dc feed current to the loop outputs, PT and PR can be coupled to the Tip and Ring through a sufficiently high resistance to allow for simple lightning protection of the drivers. However, the resistance must be low enough to achieve the coupling of sufficient ac signal to the Tip and Ring from the available power supply. Since the Tip and Ring drivers are current sources, the value of this resistance does not affect the performance of the SLIC and is somewhat arbitrary. The value chosen is typically 1000 . The L8574 also senses the differential Tip/Ring voltage via sense inputs TS and RS. The differential dc voltage is used internally for switchhook detection. The detector threshold is preset internally. The differential Tip/ Ring ac signal appears on analog output XMT. Also included on the L8574 are SCR protectors, a relay driver, one logic output (indicates switchhook and ring trip status), a 4-bit parallel logic interface, a ringing access switch, a ring trip detector, and a circuit which eliminates the battery noise that is coupled to the Tip and Ring through the dc feed resistors. The following diagram and table show the basic components required with the L8574 SLIC. Specific component values are given in cases where the value is fixed. In cases where the value may change (i.e., components that determine the ac interface), the value is not listed but equations to determine these values are given later in this document.
Talk state with an increased and current-limited output impedance. Same as talk state. The current limiter is powered up and active, but the output capacitance at VBF is reduced to approximately 350 times ILIM. This allows rapid settling of the VBF voltage during transitions from on-hook transmission to the talk state. A 10 mA dc bias current flows out of the Ring current driver into PR, and a 5 mA dc bias current flows into the Tip current driver from PT (the switchhook detector and current limiter are adjusted to compensate for this dc bias current). SW2 is closed; SW1 and SW3 are open. NSTAT reflects the status of the switchhook detector.
s s
s
s s
Applications
General
The L8574 supplies a precise differential current to the Tip/Ring pair (via PT and PR) as a function of analog signals on IRCV and RCVN. However, the current drivers connected to PT and PR are not designed to supply dc feed current to the loop. The dc loop current is fed by two external 200 resistors. When a loop is idle (onhook), the battery switch (SW1) is turned on to connect the Ring lead to VBAT1 which is typically -48 V, thus providing sufficient Tip/Ring open circuit voltage to operate various types of customer premises equipment (CPE). Transmission may or may not be enabled in the idle dc feed condition. If transmission is enabled (on-hook transmission), the current drivers are biased so that they can both source and sink sufficient signal current when no dc loop current is flowing (even in the presence of longitudinal currents on Tip and Ring). When the loop is off-hook, the battery switch (SW1) is turned off and the current limiter becomes active. This connects the Ring lead to VBAT2 (typically -48 V) through an accurate current limiter circuit which saves off-hook power dissipation. To ensure proper ac performance,
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Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Applications (continued)
General (continued)
DG RESISTOR MODULE VFX +5 D CVCC 0.1 F
2, 27, 35 2, 36
+5 D CVDD 0.1 F
18 17 19 16 15 14 13 12 11 9
CB1 0.1 F R2 200 R4 100 k R6 200 k R8 1 k R7 1 k R1 200 R5 200 k
K1
VCCA 41 AGND XMT
42 31 30 43
DGND VDD RDO CE B0 B1 B2 B3 CS NSTAT
TS PT PR RS L8574
TIP RING
F1 F2
PARALLEL DATA INTERFACE TO CONTROL LOGIC
R3 100 k R10 600 k CRT 0.1 F RRT 1 M
25 21 20 33
VFX VBF RSW
XMT RT2 RGX GSX(n) 1/4 T7504 VFXIN(n) RHB1 VFRO(n)
RT1 RTS CLIM IRCV 1
3
RCVN 44 RRV2
RCX1
CLIM 33 nF CCBN1 RCBN1 CBN RGBN 4 FGND VBAT1 VBAT2 VRNG PRA PRB PTA
C2 CB2 0.1 F RRV1 R9 20 k CGBN
0.22 F 5.11 k RCBN4 1 M CCBN2 0.01 F RCBN2 301 k RCBN3 9.53 k
38 8 RBIAS17
22 34
23, 27 40
RGBN
RESISTOR MODULE
19.6 k + CBIAS1 10 F DSPEED 20 V RINGING SUPPLY
CVBAT 0.1 F
47 pF* 50 k*
RBIAS2 19.6 k
CBIAS2 0.47 F
12-3384.d (F)
* Optional components to improve PSRR by 6 dB.
Figure 5. External Components Required
Lucent Technologies Inc.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Applications (continued)
General (continued)
Table 15. External Components Required Comp. F1 F2 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 CVCC CVDD CBAT CLIM RCBN1 RCBN2 RCBN3 RCBN4 CCBN1 Function Fuse Protector Fuse Protector dc Feed Protection dc Feed Protection Transmit Gain Transmit Gain Transmit Gain Transmit Gain Protection Protection Battery Noise Cancellation Ringing VCC Filter VDD Filter VBAT Filter Current Limit Battery Noise Cancellation Battery Noise Cancellation Battery Noise Cancellation Battery Noise Cancellation Battery Noise Cancellation Implementation Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module Resistor Module External External External External External External External External External Value -- -- 200 200 100 k 100 k 200 k 200 k 1 k 1 k 20 k 600 0.1 F 0.1 F 0.1 F 33 nF 5.11 k 301 k 9.53 k 1 M 0.22 F Attribute1 -- -- 1.0%, 2 W2 1.0%, 2 W2 1.0%, 25 mW3 1.0%, 25 mW3 1.0%, 25 mW3 1.0%, 25 mW3 2.0%, 0.1 W 2.0%, 0.1 W 10 mW4 1.0%, 1.6 W (14 W for 250 ms) 20%, 10 V 20%, 10 V 20%, 100 V 20% 100 V 1%, 1/16 W 1%, 1/16 W 1%, 1/16 W 1%, 1/16 W 20%, 100 V
1. Power is continuous rms power. 2. R1/R2 = 1, with a tolerance of 0.35% for 50 dB longitudinal balance, 0.2% for 58 dB longitudinal balance. Fuses F1 and F2 provide fail-safe operation if excessive overvoltage conditions exist on Tip and Ring. They will not operate if the total power dissipation of the entire resistor network is 5 W at 85 C. 3. (R3 + R6)/(R4 + R5) = 1 with a tolerance of 0. 35% for 50 dB longitudinal balance, 0.2% for 58 dB longitudinal balance. 4. R9/R1 = 100 with a tolerance of 0.5%.
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Applications (continued)
General (continued)
Table 15. External Components Required (continued) Comp. CCBN2 CGBN5 RGBN5 CRT RRT RBIAS1 RBIAS2 CBIAS1 CBIAS2 DSPEED CB1 CB2 RT1 RT2 RGX RGX1 RRV1 RRV2 C2 RHB1 Function Battery Noise Cancellation Battery Noise Cancellation Battery Noise Cancellation Ring Trip Ring Trip dc Bias for On-hook Trans. dc Bias for On-hook Trans. ac Transmission ac Transmission Reduce Settling Time Off-hook to On-hook dc Blocking dc Blocking ac Interface ac Interface ac Interface ac Interface ac Interface ac Interface ac Interface ac Interface Implementation External External External External External External External External External External External External External External External External External External External External Value 0.01 F 47 pF 50 k 0.1 F 1 M 19.6 k 19.6 k 10 F 0.47 F 20 V 0.1 F 0.1 F See ac Design Equations See ac Design Equations See ac Design Equations See ac Design Equations See ac Design Equations See ac Design Equations See ac Design Equations See ac Design Equations Attribute1 20%, 100 V 20%, 100 V 20%, 100 V 20%, 100 V 1%, 1/16 W 1%, 1/16 W 1%, 1/16 W 20%, 100 V 20%, 100 V Zener 20%, 10 V 20%, 10 V 1%, 1/32 W 1%, 1/32 W 1%, 1/32 W 1%, 1/32 W 1%, 1/32 W 1%, 1/32 W 1%, 1/32 W 1%, 1/32 W
1. Power is continuous RMS power. 2. R1/R2 = 1, with a tolerance of 0.35% for 50 dB longitudinal balance, 0.2% for 58 dB longitudinal balance. Fuses F1 and F2 provide fail-safe operation if excessive overvoltage conditions exist on Tip and Ring. They will not operate if the total power dissipation of the entire resistor network is 5 W at 85 C. 3. (R3 + R6)/(R4 + R5) = 1 with a tolerance of 0. 35% for 50 dB longitudinal balance, 0.2% for 58 dB longitudinal balance. 4. R9/R1 = 100 with a tolerance of 0.5%. 5. Optional components to improve PSRR by 6 dB.
Lucent Technologies Inc.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Applications (continued)
Resistor Module
The L8574 requires certain external resistors at the Tip and Ring interface. Because of matching and protection requirements, one of the most economical options recommended to implement these resistors is in a thick-film resistor module. A schematic and a brief description of the function of each of these resistors is given in Figure 6. Note that Microelectronic Modules Corporation MMC* A31A8574AA and MMC A11A8574AA thick-film resistor modules are application-specific resistor modules designed for use with the L8574 SLIC. The values, tolerance, matching, and power rating of the MMC A31A8574AA and MMC A11A8574AA modules are given in Table 16. Resistors R1 and R2 are the dc feed resistors. R1 is connected from battery to Ring and R2 is connected from Tip to ground. The dc loop current is fed to the subscriber loop via these resistors. The resistors set the dc feed resistance, which is R1 + R2 (400 = 200 + 200). Resistors R1 and R2 also provide a common-mode impedance of (200 || 200) 100 . These resistors will primarily determine the longitudinal balance of the line circuit; thus, they must be matched appropriately to meet longitudinal balance requirements (0.35% for 50 dB and 0.2% for 58 dB). Also, they have a significant impact on the termination impedance of the SLIC. Feedback using external components (external components when a first- or second-generation codec is used) allows the user to set the termination impedance at 600 , or most ITU-T recommended termination impedances. Under normal operating conditions, the current through resistors R1 and R2 is limited by the current-limit circuitry to 25 mA. Thus, the 2 W rating of resistors R1 and R2 in MMC A31A8574AA and MMC A11A8574AA is adequate for normal operation. The power rating of these resistors is discussed more in the Protection section of this data sheet.
*
MMC is a registered trademark of Microelectronic Modules Corporation. For additional information, contact Microelectronic Modules Corporation (MMC), 2601 S. Moorland Rd., New Berlin, WI 53151 U.S.A.: Tel. 414-785-6506, FAX 414-785-6516, e-mail sales@mmccorp.com.
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Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Applications (continued)
Resistor Module (continued)
R5 R10 F2 R7 R9 R3
R6 R4 R8 F1
GND 1 2 RING 3 PR 4 RGBN 5 GND 6 RS 7 VBF 8 9 RSW 10 TS 11 XMT 12 PT 13 TIP 14
R1 Notes: 1. Pin numbers and resistor labels are per MMC A31A8574AA and MMC A11A8574AA descriptions. 2. Node labels are per L8574 package. 3. For 600 V power cross, resistor networks should "open" in less than 40 ms.
R2
5-5279 (F)
Figure 6. Resistor Network Table 16. MMC A31A8574AA and MMC A11A8574AA Module Resistor R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R9/R1 R1/R2 (R3 + R6)/(R4 + R5) Value 200 200 100 k 100 k 200 k 200 k 1 k 1 k 20 k 600 100 1 1 Tolerance 1.0% 1.0% 1.0% 1.0% 1.0% 1.0% 2.0% 2.0% -- 1.0% 0.5% 0.35%2 0.35%2 Power1 2.0 W 2.0 W 25 mW 25 mW 25 mW 25 mW 0.1 W 0.1 W 10 mW 1.6 W -- -- -- Surge Rating Lightning: Power Cross Lightning: Power Cross None None Lightning: Power Cross Lightning: Power Cross Lightning: Power Cross Lightning: Power Cross None 14 W for 250 ms -- -- --
1. Continuous (RMS) power. 2. For 50 dB longitudinal balance; 0.2% for 58 dB balance. Note: Fuses F1 and F2 provide fail-safe operation if excessive overvoltage conditions exist on Tip and Ring. They will not operate if the total power dissipation of the entire resistor network is 5.0 W @ 85 C.
Lucent Technologies Inc.
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L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Applications (continued)
Resistor Module (continued)
Resistors R3--R6 set the gain of the SLIC in the transmit (2-wire to 4-wire) direction. This is shown in Figure 7.
R3 100 k R5 200 k TIP RING R6 200 k R4 100 k - + XMT
normal operating conditions. The ability of these resistors to withstand fault conditions depends on the power rating. Resistor R9 is also included on the thick-film resistor module. This resistor is used to set the gain of the battery noise cancellation circuit. See the Battery Noise Cancellation section of this data sheet for design equations to set the value of R9. Power ringing is applied to the line circuit through resistor R10. One side of R10 is connected to L8574 node RSW. RSW is the output of the integrated solid-state ringing access switch, SW3. The other side of R10 is connected to the 200 Ring feed resistor, R1. Resistor R10 also serves as a current-limiting resistor. Fault current through the solid-state ringing access switch, SW3, is limited by R10. SW3 is rated for 2 A maximum for a 10 s x 1000 s (lightning) pulse. Continuous current through this switch should be less than 150 mA. R10 in resistor modules MMC A31A8574AA and MMC A11A8574AA is chosen to be 600 .
5-5277 (F)
Figure 7. L8574 SLIC Matching Requirements
Protection
The matching of resistors R3--R6 will determine the gain accuracy of the SLIC; therefore, these resistors must be matched accordingly. Their matching requirements are given in Table 16. Because of the high resistance values, the normal operating power of resistors R3--R6 will be relatively low. Given design margin and thick-film technology capabilities, a power rating of 250 mW for these resistors is not unreasonable. Resistors R7 and R8 are used to couple the PT and PR current drive amplifiers to Tip and Ring. Since PT and PR drive amplifiers are current sources, the value of the series resistance does not affect the loop length or other performance of the SLIC, and may be arbitrarily high for protection purposes. A value of 1 k is adequate for protection purposes. Under normal operating conditions, these resistors will see the battery voltage less the Tip/Ring voltage. Assuming a Tip/Ring voltage of 6 V (representative of a short into a handset), the normal continuous operating power of R7 and R8 is given by: (48 V - 6 V) E2/2.0 k = 0.882 W per R7 and R8 resistor pair 882 mW/2 = 441 mW per resistor (R7 and R8) Hence, the operating power rating of 500 mW for R7 and R8. This is the normal rating for R7 and R8 under Because of the resistive feed architecture, a simple inexpensive protection scheme that does not require an external protection device may be used. The MMC A31A8574 resistor module has specifications which are qualified to ITU-T K20, UL* 1459, UL 497A, FCC Part 68.302 (d) & (e), and REA Form 397G specification. The MMC A11A8574AA resistor module, in addition to meeting all the specifications of the MMC A31A8574, also meets Bellcore 1089 requirements. Lightning and power-cross protection are provided by the two external dc feed (and current-limiting) resistors, R1 and R2, in the external resistor module. Under fault conditions, these resistors serve as fault currentlimiting resistors. These resistors are designed to survive lightning surges. They are also designed to continuously dissipate 4 W each and to survive 1 Arms @ 60 Hz power crosses of 1 second in duration. Sustained power dissipation above these levels will cause degradation and eventual failure; however, the resistors are designed to fail gracefully under these conditions. Pins PT and PR are isolated from the loop by external 1000 resistors, and pin VBF is isolated from the loop by the Ring-side, 200 dc feed resistor. These pins must have adequate fault protection which operates outside of their normal operating voltages. All three pins are protected by SCRs which clamp the surge currents (both positive and negative) to FGND. The
* UL is a registered trademark of Underwriters Laboratories, Inc.
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Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
tors to perform a differential to single-ended conversion. The operational amplifier inputs are TS and RS. Output XMT is referenced to ground (AGND). The longitudinal balance and gain accuracy at XMT depends on the matching of the external resistors (0.35%). Because a large dc potential exists at XMT, a capacitor must be used to couple the ac signal to the low-voltage codec circuitry.
Applications (continued)
Protection (continued)
sense inputs, TS and RS, are protected with diodes to battery (VBAT1) and VCCA and the series high-value external resistors which connect them to Tip and Ring. Because the battery noise cancellation input CBN is connected to pin VBF through a 0.1 F capacitor, it must also be protected. Internally, it is protected with an 8 V zener diode connected to VCCA. An external resistor of at least 3 kW (5 kW is recommended) is required to limit the surge current. No external protection device is required.
Battery Noise Cancellation
The battery noise cancellation circuit senses the ac noise on the battery via the capacitor connected from input CBN to VBF. It couples this noise, 180 out of phase, to the Ring current drive amplifier. This cancels the battery noise that is coupled to the Ring through the feed resistor connected to VBF. Additionally, it ensures longitudinal balance, which depends only on the matching of the battery feed resistors by creating an ac ground at VBF with respect to signals on the Ring lead. For the cancellation to operate properly, both the phase and gain must be accurate. The battery noise cancellation gain is a transconductance which is equal to 100 divided by the resistor connected from RGBN to ground (AGND). This value must be equal to the reciprocal of the dc feed resistor (1/200). That is: 100/R9 = 1/200 R9 = 20 k It is advantageous if resistors R9 and R1 are matched and tracked thermally, i.e., located on the same film integrated circuit (FIC). PSRR can be improved by adding a 47 pF capacitor in series with a 50 k resistor from RGBN to ground. Also, to implement the battery noise cancellation function, connect the following circuit from CBN to VBF and analog ground.
VBF
Tip/Ring Drivers
The L8574 has two Tip/Ring drivers with outputs called PT and PR. Each driver operates as a current source capable of sinking or sourcing adequate ac signal current plus the dc bias current that is required during onhook transmission.
Receive Interface
The receive interface circuitry couples the differential signal on receive inputs IRCV and RCVN to the Tip/ Ring drivers. Input IRCV is a low-impedance (<5 ) current input while RCVN is a high-impedance voltage input. Internal feedback forces the voltage at IRCV to be equal to RCVN so that a voltage applied to RCVN causes a current flow out of IRCV which equals that voltage divided by the impedance connected from IRCV to AGND (assuming the input voltage is referenced to AGND). The receive interface and Tip/Ring drivers provide a current gain of 200; i.e., a differential output current flows from PT to PR which is 200 times the current flowing into IRCV. The receive interface also provides a level shift since the inputs, IRCV and RCVN, are referenced to analog ground, while the outputs, PT and PR, swing between VCCA and VBAT1. The receive interface ensures that the input current is not converted to a common-mode current at PT and PR.
L8574 0.1 F 5.11 k CBN 0.01 F 301 k
Transmit Interface
The transmit interface circuitry interfaces the differential voltage on Tip and Ring to transmit output XMT. The Tip/Ring differential voltage (both ac and dc) appears on output XMT with a gain of 0.5. The transmit interface uses an operational amplifier with four external resisLucent Technologies Inc.
5-5278a (F)
Figure 8. Implementing the Noise Cancellation Function 25
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Applications (continued)
On-Hook Transmission
During the on-hook transmission and talk/on-hook transmission states, the L8574 provides 750 A dc bias current out of the Tip/Ring current driver amplifiers. This creates a dc voltage drop across the external 19.6 k resistors, RBIAS1 and RBIAS2, which provides sufficient dc bias to support on-hook transmission. The switchhook detector is adjusted to compensate for this dc bias current. The L8574 is able to support on-hook transmission to drive a 3.17 dBm signal into a 600 or 900 ac loop. The capacitors, CBIAS1 and CBIAS2, provide an ac path so transmission is not distorted by RBIAS1 and RBIAS2. Zener diode, DSPEED, reduces the settling time transition from on- to off-hook.
Detector values are independent of office battery and are valid over the entire range of VBAT1 and VBAT2. However, NSTAT must indicate an on-hook (NSTAT = 1) if either VBAT1 or VBAT2 is disconnected (open circuit) from its dc source and an off-hook (NSTAT = 0) if the L8574 is in thermal shutdown. VBAT1 and VBAT2 are defined as disconnected depending on the voltage at the power supply pins as follows (the pins of supplies which have more than one pin are shorted together): If VBAT1 -20 V (i.e., more negative than -20 V) and VBAT2 -20 V, then NSTAT must operate normally. If VBAT1 -10 V (i.e., more positive than -10 V) or VBAT2 -10 V, then NSTAT must be on-hook (NSTAT = 1). The status of the thermal shutdown circuit is output on B3 when CS is high (thermal shutdown = 0 V).
Off-Hook Detection Parallel Data Interface
A 6-wire parallel interface (CE, CS, B0, B1, B2, and B3) is used to pass control information from the control logic on the line card to the L8574. The L8574 has eight operating states. These states are selected using three logic input bits, B0--B2, according to the truth table shown in Table 14. Logic input B3 operates a relay driver independent of the state of bits B0--B2. Data on the parallel data bus, B0--B3, is loaded into a 4-bit latch on the L8574 on the low-to-high transition of the channel select lead CS. Changes in the data at inputs B0--B3 do not affect the L8574 while CS is either low or high. A low on channel enable lead CE asynchronously resets the 4-bit latch to 1111 (scan state with the relay driver off) and disables the channel select lead CS (i.e., CS is prevented from loading any data into the 4-bit latch). A high on CE enables CS. State transitions and delays between transitions are left to the discretion of the user since, except for fault conditions, the state of the L8574 depends only on the external control provided through the logic interface. The off-hook or loop closure threshold on the L8574 SLIC is internally fixed. Off-hook is indicated (NSTAT = 0) if the loop resistance is a maximum 2700 . Onhook is indicated (NSTAT = 1) if the loop resistance is a minimum 4400 .
Ring Trip
The ring trip threshold is set by resistor R10 in the resistor module. With R10 set to 600 , the circuit is guaranteed to ring trip up to 1840 . With a 20 Hz ringing source, the trip time is guaranteed less than 200 ms. The ring trip circuit assumes uses of battery-backed ringing. Pretrip immunity is such that a load across Tip and Ring of 10 k in parallel with an 8 F capacitor will not cause ring trip. Three external components are required for ring trip, a 1 M resistor from RTS to VBF, resistor R10, which is a 600 resistor from RSW to VBF, and a 0.1 F capacitor from RSW to RTS. The components required for ring trip circuit are shown in Figure 9. Note that R10 is implemented in the resistor module. All other components are discrete.
VBF
Supervision
The L8574 offers the ring trip, loop closure, and thermal shutdown functions. The status of these functions are provided as device outputs. The outputs of the ring trip and off-hook supervision detectors are multiplexed into a single output called NSTAT. The device state determines which output is connected to NSTAT. The device state table, Table 14, details which supervision output (loop closure or ring trip) is seen at NSTAT during a given device state.
R10 600 0.1 F RTS 1 M
5-5276 (F)
RSW L8574
26
Figure 9. Ring Trip Threshold Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications Battery Supplies
There are two battery pins on the L8574, VBAT1 and VBAT2. These two nodes may be connected to a common negative battery voltage. The magnitude of the battery should be sufficient to supply the required dc current into the specified (long) loop requirement. Integrated into the L8574 is solid-state switch, SW1. SW1 has similar characteristics to the line break switch, SW2, including the 35 mA current limit. When SW1 is closed, the battery is applied through SW1 from the VBAT1 node. dc current from the battery will be limited by the current-limiting action of SW1. When SW1 is open, the battery at VBAT1 is isolated from the loop. The internal current-limit circuit is associated with the VBAT2 node; thus, when the current-limit circuit is active, the battery is applied to the subscriber loop through VBAT2 node and through the internal current-limiting circuitry, limiting dc current to the subscriber loop to 28 mA. When the current-limit circuit is not active, the voltage battery at VBAT2 is isolated from the loop. The state of SW1 and the current-limiting circuit is controlled via logic inputs B0--B2. The L8574 state table (Table 14) details, for a given operational state, the condition of SW1 and the current-limit circuit.
Applications (continued)
Thermal Shutdown
If the silicon temperature rises above a nominal 145 C, the L8574 will enter a thermal shutdown mode where all switches are off and the SLIC is in a state that is functionally equivalent to the disconnect state.
Relay Driver
The L8574 offers a single integrated relay driver. The relay driver output RDO is low (relay operated) when a low input on B3 is latched into the device. The driver has sufficient driver capability to provide 70 mA with a 1.0 V drop and 20 mA with a 0.4 V drop. Turn-off and turn-on times are a maximum of 10 s.
Solid-State Ringing Access
The L8574 offers a solid-state ringing access switch for power ringing access and for the associated line break function. During the Ringing state, unbalanced batterybacked power ringing is applied to the Ring lead through resistors R10 and R1 via ringing access switch SW3. The Ring drive amplifier of the L8574 SLIC is isolated from the subscriber loop via the integrated line break switch SW2 during the power ringing state. Since the Tip lead of the L8574 SLIC is tied to ground via resistor R2, no line break function is associated with the Tip lead. The return ground path for the power ringing signal is via R2. The line break switch, SW2, is implemented using a high-voltage MOS transistor. This gives a linear V-I characteristic, as seen in Figure 3. The ON resistance of this switch is a nominal 50 with a maximum 100 . This switch is current limited to a nominal 35 mA and has a maximum off-state voltage rating of 320 V. The ringing access switch, SW3, is implemented using a pnpn type structure. This gives a linear V-I characteristic with an offset through the origin, as shown in Figure 4. This offset is less than 3 V. The off-state voltage rating is 500 V. Surge current (10 s x 1000 s) through this switch must be limited to less than 2 A. Steady state current through this switch must be limited to less than 150 mA.
dc Characteristics
V-I Characteristics
Resistors R1 and R2 are the dc feed resistors. R1 is connected from battery to Ring, and R2 is connected from Tip to Ground. The dc loop current is fed to the subscriber loop via these resistors. When the L8574 is operating in the linear region of the V-I characteristic, the dc feed resistance or slope of this region of operation is determined by the sum of resistors R1 plus R2. The slope of the V-I characteristic will be -1/400 . When the L8574 is operating in the current-limited region of the V-I characteristic, the current will be constant, regardless of loop length, and will be set and fixed by the internal current-limit circuit. The current limit is internally fixed to a nominal 28 mA. Connect a 33 nF capacitor from CLIM to VBF. Note that there is a slope of 1/10 k to the V-I characteristic in the currentlimited region of operation.
Lucent Technologies Inc.
27
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
dc Characteristics (continued)
V-I Characteristics (continued)
In longer loops, the L8574 will operate in the linear region of operation, and in short loops, to conserve power, the L8574 will operate in the (fixed) current-limit region of operation. A typical V-I characteristic for the L8574 is shown in Figure 10 below.
50
ac Design
Codec Features and Selection Summary
There are four key ac design parameters:
s
Termination impedance is the impedance looking into the 2-wire port of the line card. It is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. Transmit gain is measured from the 2-wire port to the PCM highway. Receive gain is done from the PCM highway to the transmit port. Hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port.
s
40
LOOP CURRENT (mA)
s
30
ILIM
1 10 k
s
20 -1 = -1 RDC1 400 10
0 0 10 20 30 40 50
At this point in the design, the codec needs to be selected. The discrete network between the SLIC and the codec can then be designed. Below is a brief codec feature and selection summary. First-Generation Codecs
LOOP VOLTAGE (V)
12-3050.e (C)
Note: VBAT1 = -48 V, VBAT2 = -48 V; ILIM = 28 mA; RDC = 400 .
Figure 10. Loop Current vs. Loop Voltage
Loop Length
The loop range is calculated as follows: RL = ({|VBAT| - VOHLIM}/ILIMIT) - R1 - R2 Where: RL is the dc resistance of the subscriber loop. VOHLIM is the overhead or drop associated with the current-limit circuit, typically 2.2 V. ILIMIT is the minimum specified current that is required at the maximum loop length, typically 18 mA.
These perform the basic filtering, A/D (transmit), D/A (receive), and -law/A-law companding. They all have an op amp in front of the A/D converter for transmit gain setting and hybrid balance (cancellation at the summing node). Depending on the type, some have differential analog input stages, differential analog output stages, and -law/A-law selectability. This generation of codec has the lowest cost. It is most suitable for applications with fixed gains, termination impedance, and hybrid balance. Second-Generation Codecs This class of devices includes a microprocessor interface for software control of the gains and hybrid balance. The hybrid balance is included in the device. ac programmability adds application flexibility and saves several passive components. It also adds several I/O latches that are needed in the application. It does not have the transmit op amp, since the transmit gain and hybrid balance are set internally.
|VBAT| is the minimum magnitude of the battery-- assume 43.2 V.
R1 = R2 = dc feed resistors = 200 . RL = ({43.2 V - 2.2 V}/0.018 A) - 200 - 200 = 1877 .
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Both forms are equivalent to each other, and it does not matter which form is specified. The component values in the interface circuit of Figure 11 are calculated assuming the parallel form is specified. If the termination impedance to be synthesized is specified in the series form, convert it to the parallel form using the equations below:
R1 = R1 + R2 R1 2 + R2R1 R2 = -----------------------------R2 C C = -----------------------------------------R1 R1 2 1 + 2 ------ + ------ R2 R2
ac Design (continued)
Codec Features and Selection Summary
(continued) Third-Generation Codecs This class of devices includes the gains, termination impedance, and hybrid balance--all under microprocessor control. Depending on the device, it may or may not include latches. In the codec selection, increasing software control and flexibility are traded for device cost. To help decide, it may be useful to consider the following:
s
Will the application require only one value for each gain and impedance? Will the board be used in different countries with different requirements? Will several versions of the board be built? If so, will one version of the board be most of the production volume? Does the application need only real termination impedance? Does the hybrid balance need to be adjusted in the field?
Note that if the termination impedance is specified as pure resistive: R2 = R2 = 0 and C = C = Define the gain constant, K, as follows:
KRCV = K010 KTX = ------10 K0
Rx/20
s
s
for receive gain
s
1
Tx/20
for transmit gain
Where, RX = desired receive (or PCM to Tip/Ring) gain in dB TX = desired transmit (or Tip/Ring to PCM) gain in dB
K0 = ZT 1 kHz ------------------------- = power transfer ratio 600
s
Design Equations
The following section gives the relevant design equations to choose component values for any desired gain, termination, and balance network, assuming a complex termination is desired. Complex termination will be specified in one of the two forms shown below.
R2 R1 C R1 R2 C
Where |ZT| (1 kHz) is the magnitude of the complex termination impedance ZT being synthesized. This equation assumes that the TLP of the codec is 0 dBm referenced to 600 . The following equation applies when referring to Figure 11:
2 C R1R2 + R1 + R2 - jR2 C ZT = -------------------------------------------------------------------------------------22 2 1 + R2 C
2 2 2
(SERIES FORM)
(PARALLEL FORM)
12-3425(F)
Where, = 2 = 1000 Hz CR1R2 is defined per Figure 11 (series form), and
ZT = 2 C 2 R1R2 2 + R1 + R2 R2 2 C ----------------------------------------------------------- + ---------------------------------- 22 2 1 + 2 R2 2 C 2 1 + R2 C
2 2
Figure 11. Equivalent Complex Terminations
Lucent Technologies Inc.
29
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
ac Design (continued)
Design Equations (continued)
RESISTOR MODULE
RGX GSX TS RS - AX + 1/2 L8574 VRN VRN RT1 VBAT XMT VXMT PT RECEIVE INTERFACE PR 1 k 200 IRP LRP RT2 CT ZIRP CR RRV1 RHB1
100 k
RGX1
VFXIN
- +
+2.4 V
200 k 200 k R2 R1 + Z T/R VT/R IT/R - C1
100 k
200 1 k
RRV2
VFRO
1/4 T7504 CODEC
VBAT
12-3429.b (F).r3
Figure 12. Initial ac Interface for Complex Termination Between L8574 SLIC and T7504 Codec Note: dc Blocking Capacitor (CB) Not Shown, CT and CR Separate The Tip/Ring differential current is given by: VRN IT/R = 200 IRP - ---------- ZIRP The voltage at pin XMT is given by: - VT/R VXMT = ------------2 The component values in the ac interface of Figure 12 are calculated (for the transmit and receive gains defined by the respective gain constants KRX and KRCV, and for the termination impedance seen in Figure 11) using the following equations: 100R1 RRV1 = -----------------KRCV 100R2 RRV2 = -----------------KRCV KRCVC CR = ------------------100 RRV1 1 RGX1 1 ----------------------------- = ------------ --------- - -------- RGX1 + RT1 100 600 R1 400 = 2 x 200 feed resistors RGX = 2 x KTX ( RGX1 + RT1 ) 100R1 C RGX1 CT = --------- 1 + ------------ 1 + ------------------ RT1 100 RRV1 R2C RT2 = -------------CT Note that the 200 feed resistors contribute 400 to the termination impedance. The termination impedance associated with the circuit in Figure 12 consists of this inherent 400 feeding impedance in parallel with:
s
A negative impedance, where, 2 RGX1 --------- x ----------------------------100 RGX1 + RT1
s
A positive impedance, where, 1 RT2 + ------------- * RGX1 + RT1 ----------------------------- RT1 jCT
The negative and positive impedance terms are used to adjust the termination impedance from the inherent 400 to any complex termination.
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Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
ac Design (continued)
Design Equations (continued)
Using the circuit of Figure 12, the ratio of capacitors CT and CR will affect the (transmit and receive) gain flatness, and to a lesser degree the return loss of the line circuit. Thus, depending on the requirements, CT and CR may need to be tight tolerance capacitors. If this is the case, capacitors CT and CR may be combined into a single capacitor with a looser tolerance. This is illustrated in Figure 13.
XMT XMT
RT2
-- -- --
RT2
CT IRP CR RRV2 VFRO IRP CS = CT + CR RRV2 VFRO
RRV1 RRV1
12-3426.a(F).r3
Figure 13. Revised ac Interface CT and CR Combined into a Single Capacitor CS To scale CS (higher), increase CT (and decrease RT2) by increasing the RGX1/(RGX1 + RT1) ratio by rearranging the circuit in Figure 13 and by adding resistor RSC from XMT to IRP as shown below.
VRN RGX1 RT1 CB XMT RT2 RSC CT IRP
12-3427.abF)
VFXIN
The L8574 SLIC is ground referenced. However, a +5 V only codec, such as T7504, is referenced to +2.5 V. The L8574 SLIC has sufficient dynamic range to accommodate an ac signal from the codec that is referenced to +2.5 V without clipping distortion. Furthermore, a dc current will flow between the L8574 SLIC and +5 V only codec. With the L8574 SLIC, this current will not affect ac performance, but it does waste power. To avoid wasted power consumption, blocking capacitors can be added. Capacitors should be placed to block any path from any low impedance +2.5 V biased node on the T7504 codec (or other +5 V only codec) to the SLIC. A blocking capacitor (CB) has been added in the application drawing in Figure 14. After the blocking capacitor CB is added, the above component values may have to be adjusted slightly to optimize performance. The effects of the blocking capacitor are best evaluated and optimized by circuit simulation. Contact your Lucent Technologies Microelectronics Group Account Manager for information on availability of a PSPICE* model.
*PSPICE is a registered trademark of MicroSim Corporation.
Figure 14. Addition of Resistor RSC from XMT to IRP Then,
( RRV1 || RSC ) 1 RGX1 RRV1 1 - ----------------------------- = ------------------------------------ --------- - -------- + -----------------------------100 RGX1 + RT1 400 R1 RRV1 + RSC
Once the gains and complex termination are set, if the hybrid balance network is identical to the termination impedance, then the hybrid balance is set by a single resistor (shown in Figure 12) and is computed as follows: RGX RHB = ---------------------------KTX x KRCV Lucent Technologies Inc.
31
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
ac Design (continued)
Design Equations (continued)
As a practical design example, design the interface for the following set of requirements: RX = 0 dB TX = 0 dB ZT = 900 Hy = 900 First, calculate the gain constants: Ko = ZT 600
---------- = -
RT1 = 0 C RGX1 100 R1 CT = ---------- 1 + -------------- 1 + ---------------------- 100 RT1 RRV1 CT = R2C RT2 = --------------- = 0 CT RGX = 2 x KTX (RGX1 + RT1) RGX = 2 x 0.8165 (100 k + 0) RGX = 163.3 k Choose a standard value resistor: RGX = 165 k RGX RHB = ---------------------------KTX x KRCV 165 k RHB = ----------------------------------------- = 165 k 0.8165 x 1.2247 Therefore, for this design example, use the following values in the circuit shown in Figure 12. RT1 = 0 k RT2 = 0 RGX = 165 k RGX1 = 100 k RRV1 = 73.2 k RRV2 = 0 RHB1 = 165 k CT = CR = Figure 15 is the application circuit with the above values.
900 ---------- = 1.2247 600
KRCV = KO10RX/20 = 1.2247 x 100/20 = 1.2247 1 KTX = ------- 10TX/20 = 0.8165 Ko Second, calculate individual components: RRV1 = 73,487 Choose a standard value component: RRV1 = 73.2 k 100 RX RRV2 = ---------------------- = 0 RRCV KRCVC CR = --------------------- = 100 RRV1 1 RGX1 1 ------------------------------- = -------------- ---------- - -------- 100 400 R1 RGX1 + RT1 Choose RGX1 = 100 k: 73.2 k 1 100 k 1 -------------------------------------- = ---------------------- ---------- - ---------- 100 400 900 100 k + RT1 100 k -------------------------------------- = 1.01 100 k + RT1
32
Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Application Diagram
DG VFX RESISTOR NETWORK +5 D 0.1 F 0.1 F 200 100 k
42 2, 27, 35 2, 36
+5 D 0.1 F
18 17 19 16 15 14 13 12 11 9
K1
VCCA 41 AGND XMT TS PT PR RS
DGND VDD RDO CE B0 B1 B2 B3 CS NSTAT
F1 TIP RING F2
200 k 1 k 1 k 200 200 k 100 k 600 0.1 F 1 M
31 30 43
PARALLEL DATA INTERFACE TO CONTROL LOGIC
L8574C SLIC
25 21 20 33
VBF RSW RTS CLIM IRCV 1 165 k VFX RCVN 44 100 k 165 k
GSX(n) 1/4 T7504 VFXIN(n) VFRO(n)
33 nF 0.22 F 5.11 k
3
CBN VBAT2 VRNG PRA PRB PTA
73.2 k RGBN 4 20 k FGND VBAT1
1 M 0.01 F
301 k
38 8
7
22 34
23, 27 40
9.53 k
19.6 k + 10 F DSPEED 20 V RINGING SUPPLY
RESISTOR NETWORK
CVBAT 0.1 F
19.6 k
0.47 F
12-3384.c (F)
Figure 15. TR-57 Application Diagram
Lucent Technologies Inc.
33
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Data Sheet October 1998
Outline Diagram
44-Pin PLCC
Dimensions are in millimeters.
17.65 MAX 16.66 MAX PIN #1 IDENTIFIER ZONE
6
1
40
7
39
16.66 MAX 17.65 MAX
17
29
18
28
4.57 MAX SEATING PLANE 1.27 TYP 0.53 MAX 0.51 MIN TYP 0.10
5-2506 (C) r07
34
Lucent Technologies Inc.
Data Sheet October 1998
L8574D Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Long Loop and TR-57 Applications
Ordering Information
Device Part No. LUCL8574DP-D LUCL8574DP-DT Description Resistive SLIC, Ring Relay, and Protector for Long Loop and TR-57 Applications Resistive SLIC, Ring Relay, and Protector for Long Loop and TR-57 Applications Package 44-Pin PLCC (Dry-bagged) 44-Pin PLCC (Tape and Reel, Dry-bagged) Comcode 107874794 107840688
Lucent Technologies Inc.
35
For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro E-MAIL: docmaster@micro.lucent.com N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai 200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1189 324 299, FAX (44) 1189 328 148 Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Bracknell), FRANCE: (33) 1 41 45 77 00 (Paris), SWEDEN: (46) 8 600 7070 (Stockholm), FINLAND: (358) 9 4354 2800 (Helsinki), ITALY: (39) 2 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid)
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Copyright (c) 1998 Lucent Technologies Inc. All Rights Reserved
October 1998 DS98-434ALC (Replaces DS98-066ALC)

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